Circuits for testing timing and more particularly for testing the characteristics of clocks are of general interest in the data processing and communication fields.
It is well known to those skilled in the art of data processing that there has been a general tendency to improve the performance of systems by increasing speed, thereby requiring electronic components to be clocked at higher and higher speeds. Thus, components are used at a frequency near their critical frequency, over which failures are more prone to occur. Clocks which are normally used to drive the electronic components require close checking to ensure that they operate at the desired frequency. Conversely, the technology of DRAM requires that a Dynamic Random Access Memory be regularly refreshed in order to save its contents. In this case, the refreshing frequency also requires checking to ensure that it remains below the critical refreshing frequency of the DRAM, at which value the contents of a DRAM may unfortunately be destroyed.
In the data communication field, the transmission of data over telecommunication lines at high speed also entails the need for timing circuits and clocks with accurate and constant characteristics.
A need therefore exists in telecommunication and data processing for a device which tests the value of the frequency of a clock and, more particularly, which determines whether this frequency is within a predetermined range. Furthermore, it is desirable that this range of frequencies be easily adaptable to changes as a function of a desired level of accuracy.